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ORCIDMicroprocessors and Microsystems, Volume 69
Volume 69, September 2019
- Marcin Kubacki, Janusz Sosnowski:
Exploring operational profiles and anomalies in computer performance logs. 1-15
- Kamaraj Arunachalam
, Marichamy P:
Design of integrated reversible fault-tolerant arithmetic and logic unit. 16-23
- Krzysztof Kuchcinski:
Constraint programming in embedded systems design: Considered helpful. 24-34
- Asish B. Mathews, G. Glan Devadhas:
Non linearity mitigation and dispersion reduction using Bussgang theorem, modified MSE and improved MLE equalizers. 35-42 - Shanigarapu Nareshkumar, Kalagadda Bikshalu:
Adaptive absolute SCORE algorithm for spectrum sensing in cognitive radio. 43-53
- Luigi Pomante, Vittoriano Muttillo, Bohuslav Krena, Tomás Vojnar, Filip Veljkovic, Pacome Magnin, Martin Matschnig, Bernhard Fischer, Jabier Martinez, Thomas Gruber:
The AQUAS ECSEL Project Aggregated Quality Assurance for Systems: Co-Engineering Inside and Across the Product Life Cycle. 54-67
- Saranya Karunamurthi, Vijeyakumar Krishnasamy Natarajan:
VLSI implementation of reversible logic gates cryptography with LFSR key. 68-78
- Bardia Safaei, Ali Asghar Mohammad Salehi, Amir Mahdi Hosseini Monazzah, Alireza Ejlali:
Effects of RPL objective functions on the primitive characteristics of mobile and static IoT infrastructures. 79-91
- Rajasekhar Turaka, M. Satya Sai Ram:
Low power VLSI implementation of real fast Fourier transform with DRAM-VM-CLA. 92-100
- Paulo Cesar Santos, João Paulo C. de Lima, Rafael Fao de Moura, Hameeza Ahmed, Marco A. Z. Alves, Antonio C. S. Beck, Luigi Carro:
A Technologically Agnostic Framework for Cyber-Physical and IoT Processing-in-Memory-based Systems Simulation. 101-111
- Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue, Cong-Kha Pham:
A 1.2-V 162.9 pJ/cycle bitmap index creation core with 0.31-pW/bit standby power on 65-nm SOTB. 112-117 - Kunal Das, Arindam Sadhu, Debashis De, Jadav Chandra Das:
Design and simulation of priority based dual port memory in quantum dot cellular automata. 118-137 - Daniel H. Noronha, Matheus F. Torquato, Marcelo A. C. Fernandes:
A parallel implementation of sequential minimal optimization on FPGA. 138-151
- Ahmad Kayed, Suha Omar:
Periodical key change for cloud mutable security protocol. 152-158
- R. Suguna, Vimalathithan Rathinasabapathy:
An SoC architecture for energy detection based spectrum sensing using Low Latency Column Bit Compressed (LLCBC) MAC in cognitive radio wireless sensor networks. 159-167
- Arjun Ramaswami Palaniappan, Liter Siek:
A TDC-less all-digital phase locked loop for medical implant applications. 168-178
- Andrej Kolozvari, Radovan Stojanovic, Anton Zupan, Eugene Semenkin, Vladimir Stanovov, Davorin Kofjac, Andrej Skraba:
Speech-recognition cloud harvesting for improving the navigation of cyber-physical wheelchairs for disabled persons. 179-187
- G. Sathesh Kumar, V. Saminadan:
Fuzzy logic based Truly Random number generator for high-speed BIST applications. 188-197
- Ali Jooya, Nikitas Dimopoulos, Amirali Baniasadi:
Multiobjective GPU design space exploration optimization. 198-210
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