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ORCIDMicroprocessors and Microsystems, Volume 20
Volume 20, Number 1, March 1996
- Milo Tomasevic, Veljko Milutinovic:
The word-invalidate cache coherence protocol. 3-16 - Antônio Miguel Vieira Monteiro
, Wei-Wei Lu, Michael Paul Gough, Jon A. Thompson, K. H. Yearby:
A smart telemetry compression system for a space instrument: MARS-96 ELISMA instrument complex. 17-30 - Igor Ozimek:
Accessing MS-DOS applications over a TCP/IP network. 31-38 - G. T. Heng:
Microcomputer-based remote terminal unit for a SCADA system. 39-45 - Navid Madani:
Simultaneous-switching noise analysis for Texas instruments FIFO products. 47-55 - Teruo Ishii, Navid Madani:
High-speed, high-drive SN74ABT7819 FIFO. 57-61
Volume 20, Number 2, April 1996
- Jim E. Cooling:
Languages for the programming of real-time embedded systems a survey and comparison. 67-77 - Antonio Pessoa Magalhães, Mário Zenha Rela, João Gabriel Silva:
On the nature of deadlines. 79-88 - Ioannis Andreadis, Antonios Gasteratos, Philippos Tsalides:
An ASIC for fast grey-scale dilation. 89-95 - Antonio Corradi, Cesare Stefanelli:
A deadlock prevention strategy for adaptive routing systems. 97-103 - Barry Kauler:
A tiny microcontroller dataflow kernel. 105-110 - Per Stenström, Magnus Balldin, Jonas Skeppstedt:
The design of a non-blocking load processor architecture. 111-123 - Reduced DRAM cycle times with extended data-out. 125-131
- Daniel Tabak:
Advanced multimicroprocessor bus architectures : J. Zalewski (ed.), IEEE Computer Society Press, Los Alamitos, CA, 1995 ISBN 0-8186-6327-8. 133 - Jurij F. Tasic, Radovan Sernec:
Parallel algorithm derivation and program transformation : R. Paige, J. Reif and R. Wachter (eds.), Kluwer Academic, Dordrecht. ISBN 0-7923-9362-7. 133-134
Volume 20, Number 3, May 1996
- Martyn Edwards:
Editorial. 139-140 - Wayne H. Wolf:
Object-oriented co-specification for embedded systems. 141-147 - Tarek Ben Ismail, Jean-Marc Daveau, Kevin O'Brien, Ahmed Amine Jerraya:
A system-level communication synthesis approach for hardware/software systems. 149-157 - Rolf Ernst, Jörg Henkel, Thomas Benner, Wei Ye, Ulrich Holtmann, Dirk Herrmann, Michael Trawny:
The COSYMA environment for hardware/software cosynthesis of small embedded systems. 159-166 - Martyn Edwards, John Forrest:
A practical hardware architecture to support software acceleration. 167-174 - Gernot Koch, Ulrich Weinmann, Udo Kebschull, Wolfgang Rosenstiel:
System prototyping in the COBRA project. 175-184 - Ian Page:
Reconfigurable processor architectures. 185-196 - J. C. Vardaxoglou:
Microwave integrated circuits : I. Kneppo and J. Fabian (eds), Chapman & Hall, London (1994). £60 (Hardback). ISBN 0-412-54700-7. 197
Volume 20, Number 4, June 1996
- K. P. Lam, S. M. Yuen:
Time-range compatibility reasoning for asynchronous systems design. 203-209 - Libero Nigro, Francesco Tisato:
Timing as a programming-in-the-large issue. 211-223 - E. Kappos, D. J. Kinniment:
Application-specific processor architectures for embedded control: case studies. 225-232 - K. M. M. Prabhu, R. Shanmuga Sundaram:
Fast Hartley transform implementation on DSP chips. 233-240 - N. V. Satyanarayana, Rajib Mall, Ajit Pal:
A layered architecture for real-time systems. 241-250 - Yiu-Kwong Wong, K. L. Shi, Tze-Fun Chan:
Effective algorithms for designing power distribution networks. 251-258
Volume 20, Number 5, September 1996
- Andreas A. Veglis, Andreas S. Pomportsis:
Performance analysis of Clos interconnection networks under non-uniform traffic patterns. 261-265 - Harri Klapuri, Timo Hämäläinen, Jukka Saarinen, Kimmo Kaski:
Mapping artificial neural networks to a tree shape neurocomputer. 267-276 - Martti Forsell:
Minimal pipeline architecture - an alternative to superscalar architecture. 277-284 - Brian M. Reeder, Michael Paul Gough:
Application of artificial neural networks for spacecraft instrument data compression. 285-295 - M. A. Atmanand, V. Jagadeesh Kumar:
Microcontroller based LCR meter. 297-301 - System design and layout techniques for noise reduction in MCU-based systems. 303-309
- Joanne Cooling:
Software maintenance concepts and practice : Armstrong A. Takang, Penny A. Grubb, International Thompson Publishing Inc., 1996, Softbound £22.95. ISBN 1-85032-192-2. 311
Volume 20, Number 6, February 1997
- Chan Chee Keong, Chen Yin:
Implementation of a deductive database system using SQLBase. 317-323 - Toong Shoon Chan, Ian Gorton:
Parallel architecture support for high-speed protocol processing. 325-339 - R. Parthiban, C. P. Ravikumar, R. Kakarala, J. Sivaswamy:
Parallelization of symmetry detection algorithms on a network of workstations. 341-349 - C. P. Ravikumar, C. S. Panda:
Adaptive routing in k-ary n-cubes using incomplete diagnostic information. 351-360 - Tae-Jin Kim, Jong Min Kim, Sang Lyul Min, Chong-Sang Kim, Soo-Mook Moon, Seongsoo Hong:
Cache performance improvement through on-demand, in-cache page clearing. 361-371 - S. Raman, N. Rama Krishna Reddy:
A transputer-based parallel machine translation system for Indian languages. 373-383
Volume 20, Number 7, March 1997
- Gordon B. Steven, Bruce Christianson, Roger Collins, Richard D. Potter, Fleur L. Steven:
A superscalar architecture to exploit instruction level parallelism. 391-400 - Dimitrios Kagaris:
A routing algorithm for row-based FPGAs. 401-407 - Alfred C. K. Heng, Malcolm Y. H. Low:
Loop parallelisation tool for message-passing systems. 409-421 - Ding-Ming Kwai, Behrooz Parhami:
An on-line fault diagnosis scheme for linear processor arrays. 423-428 - K. S. Low, K. W. Lim, M. F. Rahman:
A microprocessor based fully digital AC servo drive. 429-436 - A. M. Fox:
Book Review. 443 - Alan Schwarzenberger:
Book Review. 443-444
Volume 20, Number 8, April 1997
- J. A. Sparks:
Low cost technologies for aerospace applications. 449-454 - James Sutton, Bernard Carré:
Achieving high integrity at low cost: a constructive approach. 455-461 - S. J. Berger:
ARINC 629 digital communication system - application on the 777 and beyond. 463-471 - J. D. Aplin:
Primary flight computers for the Boeing 777. 473-478 - A. Cook, K. J. R. Hunt:
ARINC 653 - Achieving software re-use. 479-483 - A. E. Perkins, A. D. Birch, R. C. W. Davies:
Simulation of future system data networks. 485-494 - Graeme I. P. Parkin:
Complex systems proved and improved. 495-499 - Daniel Pilaud:
Efficient automatic code generation for embedded systems. 501-504
Volume 20, Number 9, May 1997
- George A. Papadopoulos:
Experience using an intermediate compiler target language for parallel machines. 511-520 - Mark Smotherman, Max J. Domeika, Jane Watkins, Darrell Suggs:
Instruction cache performance of a commercial workload on the Motorola 88110 microprocessor. 521-527 - Yen-Chun Lin, Horng-Yi Lai:
Perfectly overlapped generation of long runs on a transputer array for sorting. 529-539 - Ashraf A. Kassim, F. K. Fong, K. S. Chua, S. Rangananth:
A DSP-based video compression test-bed. 541-551 - Jim E. Cooling, P. Tweedale:
Task scheduler co-processor for hard real-time systems. 553-566 - David N. J. White:
The hardware design of compute/DRAM TRAMS. 567-577
Volume 20, Number 10, July 1997
- Pantelis N. Botsaris, Panagiotis D. Sparis:
Microprocessor controlled three-way catalyst efficiency monitoring system. 585-593 - Soo-Won Kim, Hanseok Ko, Woo-Jong Hahn, Jong-Sik Hahm:
Design and implementation of dual processor block with shared external cache memory. 595-605 - Jouni Isoaho, Vesa Köppä, Jarkko Oksala, Pasi Ojala:
BOAR: an advanced HW/SW coemulation environment for DSP system development. 607-615 - Giovanni Godena:
Conceptual model for process control software specification. 617-630 - Dimitris Lioupis, Sotiris Milios:
Exploring cache performance in multithreaded processors. 631-642 - I. Kokolakis, Ioannis Andreadis, Philippos Tsalides:
Comparison between cellular automata and linear feedback shift registers based pseudo-random number generators. 643-658
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