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ORCIDIntegration, Volume 53
Volume 53, March 2016
- Ning Ma
, Zhuo Zou, Zhonghai Lu, Li-Rong Zheng:
Design and implementation of multi-mode routers for large-scale inter-core networks. 1-13 - Hoda Mahdiani, Saeed Safari, Mostafa E. Salehi:
Fast and accurate FPGA-based framework for processor architecture vulnerability analysis. 14-26 - Sun-Mi Park, Ku-Young Chang, Dowon Hong, Changho Seo:
Explicit formulae for Mastrovito matrix and its corresponding Toeplitz matrix for all irreducible pentanomials using shifted polynomial basis. 27-38 - Robert Wille, Eleonora Schönborn, Mathias Soeken, Rolf Drechsler:
SyReC: A hardware description language for the specification and synthesis of reversible circuits. 39-53 - Milad Bahadori, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram:
A comparative study on performance and reliability of 32-bit binary adders. 54-67 - Hailong Jiao, Yongmin Qiu, Volkan Kursun:
Variability-aware 7T SRAM circuit with low leakage high data stability SLEEP mode. 68-79 - Alexander E. Shapiro, Francois Atallah, Kyugseok Kim, Jihoon Jeong, Jeff Fischer, Eby G. Friedman:
Adaptive power gating of 32-bit Kogge Stone adder. 80-87 - Stefano Brenna, Andrea Bonetti, Andrea Bonfanti, Andrea L. Lacaita:
An efficient tool for the assisted design of SAR ADCs capacitive DACs. 88-99 - Mohammad Hashem Haghbayan, Bijan Alizadeh:
A dynamic specification to automatically debug and correct various divider circuits. 100-114 - Sadiq M. Sait, Umair F. Siddiqi:
A stochastic evolution algorithm based 2D VLSI global router. 115-125 - Zhiming Yang, Yang Yu, Chengcheng Zhang, Xiyuan Peng:
NBTI-aware adaptive minimum leakage vector selection using a linear programming approach. 126-137 - Tsung-Han Tsai, Pei-Yun Tsai, Meng-Yuan Huang, Li-Yang Huang:
WHDVI: A wireless high definition video interface technique for digital home. 138-144 - Azadeh Safari, Cheeckottu Vayalil Niras, Yinan Kong:
Power-performance enhancement of two-dimensional RNS-based DWT image processor using static voltage scaling. 145-156 - Sangmin Kim, Seungwhun Paik, Seokhyeong Kang, Youngsoo Shin:
Wakeup scheduling and its buffered tree synthesis for power gating circuits. 157-170
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