4th MEMOCODE 2006: Napa, California, USA

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Keynote Talk I

Session I: Model Checking

Session II: Rule-based HW Design

Session III: HW Verification

Panel I: Nano-Computing: Do we need New Formal Approaches to Co-Design?

Keynote Talk II

Session IV: Transaction-level Modeling

Panel II: Programming Models and Languages for SOC-Implemented Architectures

Session V: Time and Clocks

Keynote Talk III

Session VI: Scheduling and Analysis

Poster Presentations: Abstracts

a service of  Schloss Dagstuhl - Leibniz Center for Informatics