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ORCIDICPR 1992: The Hague, Netherlands - Conference D
- 11th IAPR International Conference on Pattern Recognition, ICPR 1992. Conference D: Architectures for Vision and Pattern Recognition, The Hague, Netherlands, August 30-September 3, 1992. IEEE 1992
- Bertrand Y. Zavidovique, Thierry M. Bernard:
Generic functions for on-chip vision. 1-10 - Hans Peter Graf, Craig R. Nohl, Jan Ben:
Image recognition with an analog neural net chip. 11-14 - Minesh I. Patel, Patrick McCabe, N. Ranganathan:
SIBA: a VLSI systolic array chip for image processing. 15-18 - John D. Hoyt, Harry Wechsler:
The wavelet transform-a CMOS VLSI ASIC implementation. 19-22 - Patrick Courtney, Neil A. Thacker, Chris R. Brown:
A hardware architecture for image rectification and ground plane obstacle detection. 23-26 - V. K. Sundaresan, Sanjay Nichani, N. Ranganathan, Ravi Sankar
:
A VLSI hardware accelerator for dynamic time warping. 27-30 - Pieter P. Jonker, Jan J. Gerbrands:
Image processing hardware for counting massive object streams. 31-33 - Yutaka Ishiyama, Chihiro Funaoka, Fumio Kubo, Hironobu Takahashi, Fumiaki Tomita:
Labeling board based on boundary tracking. 34-38 - Osamu Hasegawa, Chil-Woo Lee, Wiwat Wongwarawipat, Mitsuru Ishizuka:
Realtime synthesis of moving human-like agent in response to user's moving image. 39-42 - Robert M. Haralick, Arun K. Somani, Craig M. Wittenbrink, Robert Johnson, Kenneth Cooper, Linda G. Shapiro, Ihsin T. Phillips, Jenq-Neng Hwang, William Cheung, Yung Hsi Yao, Chung-Ho Chen, Larry Yang, Brian Daugherty, Bob Lorbeski, Kent Loving, Tom Miller, Larye Parkins, Steve Soos:
Proteus: a reconfigurable computational network for computer vision. 43-54 - Benjamin B. Bederson, Richard S. Wallace, Eric L. Schwartz:
A miniaturized active vision system. 58-61 - Kazuo Araki, Masaru Shimizu, Takayuki Noda, Yuji Chiba, Y. Tsuda, K. Ikegaya, K. Sannomiya, M. Gomi:
High speed and continuous 3-D measurement system. 62-65 - M. Shawky, K. M. Hou, X. W. Tu:
A trinocular vision system for a mobile robot. 66-69 - A. van Inge, Louis O. Hertzberger:
A hybrid architecture for a high performance and physical small low-level image processing system. 70-74 - P. J. Narayanan, Larry S. Davis:
Rank order filtering on SIMD machines. 75-78 - Pani N. Chakrapani, Ashfaq A. Khokhar, Viktor K. Prasanna:
Parallel stereo on fixed size arrays using zero crossings. 79-82 - Tapas Kanungo, Greg I. Chiou, Arun K. Somani, Robert M. Haralick:
Morphological image processing on a token passing pyramid computer. 83-86 - R. Mat-Ali, Min Xue, Abdelhamid Hachicha, R. J. Green, Alain Mérigot:
Parallel quadtree representation and moment invariants computation of binary image for hierarchical matching on pyramid machine. 87-90 - George Tambouratzis, A. Krikelis:
Implementing the Abingdon Cross benchmark on the ASP. 91-94 - Jorge L. C. Sanz:
Advances in massively parallel computing. 95-106 - John Moody, Patrick J. Flynn, David L. Cohn:
Parallel hypothesis verification. 107-110 - Manavendra Misra, Viktor K. Prasanna:
Parallel computation of 2-D wavelet transforms. 111-114 - Wojciech Rytter, Ahmed Saoudi:
Parallel algorithms for 2D-image recognition. 115-118 - Dimitris Gerogiannis:
Programming intermediate level vision tasks on parallel machines. 119-123 - Ian Poole:
A functional programming environment for image analysis. 124-127 - Yasuo Kozato, G. Paul Otto:
Geometric transformations in a lazy functional language. 128-132 - Gert Schwingshakl, Wolfgang Pölzleitner:
Flexible real-time programming of a distributed transputer-based vision system. 133-135 - Alberto Biancardi, Mauro Mosconi:
Visual debugging for a pyramidal machine. 137-141 - Pieter P. Jonker, Erwin R. Komen:
A scalable real-time image processing pipeline. 142-146 - Jean-Didier Legat, J. P. Cornil, Damien Macq, Michel Verleysen:
A real-time VLSI-based architecture for multi-motion estimation. 147-150 - Yuan Yan Tang, X. Cheng, Lixin Tao, Ching Y. Suen, M. Talaat, R. Inglese:
VLSI architecture for parallel concentration-contour approach. 151-154 - Maria Grazia Albanesi, Marco Ferretti:
An architecture for image compression through wavelet transform. 155-159 - Dimitris C. Gerogiannis, Stelios C. Orphanoudakis:
Efficient use of parallelism in intermediate level vision tasks. 160-164 - George Gusciora, Jon A. Webb:
Study of affine image warping on a linear processing array. 165-169 - Eduard Montseny, Gabriel Oliver-Codina, Pilar Sobrevilla:
Multi-processor system for polygonal object recognition by means of fuzzy algorithms. 170-172 - Mario Cavaiuolo, Andre Yakovleff, James A. Kershaw, Charles R. Watson, David A. Krnak:
Motion analysis using the neural accelerator board. 173-176 - E. Sicard, J. Font, M. Homar, Antonio Rubio:
An integrated approach to real-time pattern recognition. 177-180 - Neucimar J. Leite, Gilles Bertrand:
A parallel image processing language based on computational models. 181-184 - Zhaozhi Feng, Zailu Huang, Daowen Chen, Faguan Wan:
Systolic neural network architecture for second order hidden Markov models. 186-189 - Giovanni Dimauro, Gaetano Gerardi, Sebastiano Impedovo, Giuseppe Pirlo, Domenico Tegolo:
Integration of a structural features-based preclassifier and a man-machine interactive classifier for a fast multi-stroke character recognition. 190-194 - T. Collette, Hassane Essafi, Didier Juvin, J. Kaiser:
Low and intermediate level image processing on SYMPATIX, a SIMD parallel computer. 195-198 - Anna Antola, Luca Breveglieri:
Window-based dedicated parallel architectures for image processing. 199-203 - Soheil Shams, Jean-Luc Gaudiot:
Efficient implementation of neural networks on the DREAM machine. 204-208 - Carlo Colombo, Alberto Del Bimbo, Simone Santini:
A multilayer massively parallel architecture for optical flow computation. 209-213 - R. Venkatesan, Raghu Sastry, N. Ranganathan:
A VLSI architecture for hierarchical scene matching. 214-217 - Otto Milvang, Tor Lønnestad:
An object oriented image display system. 218-221 - T. Both:
An analog CMOS programmable and configurable neural network. 222-224 - Craig C. Reinhart, Ramakant Nevatia:
Issues in parallel tree search for object recognition. 225-228 - F. M. Hugen, B. Bulsink:
A low-cost architecture for real-time processing and analysis of binary images. 229-232
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