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ORCID42nd ICCD 2024: Milan, Italy
- 42nd IEEE International Conference on Computer Design, ICCD 2024, Milan, Italy, November 18-20, 2024. IEEE 2024, ISBN 979-8-3503-8040-8
- Nedasadat Taheri, Sepehr Tabrizchi, Shaahin Angizi, Arman Roohi:
ChaoSen: Security Enhancement of Image Sensor through in-Sensor Chaotic Computing. 1-8 - Ikkyum Kim, Heechun Park:
Memristive Logic-in-Memory Implementation with Area Efficiency and Parallelism. 9-15 - Mingtao Zhang, Quan Cheng, Hiromitsu Awano, Longyang Lin, Masanori Hashimoto:
S3M: Static Semi-Segmented Multipliers for Energy-Efficient DNN Inference Accelerators. 16-23 - Giacomo Lancellotti, Giovanni Agosta, Alessandro Barenghi
, Gerardo Pelosi:
Optimizing Quantum Circuit Synthesis with Dominator Analysis. 24-27 - Rui Liu, Xiaoyu Zhang, Xinyu Wang, Feng Min, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang:
MemSort: In-Memory Sorting Architecture. 28-35 - Sunan Zou, Bizhao Shi, Ziyun Zhang, Guojie Luo:
MuSA: Multi-Sketch Accelerator with Hybrid Parallelism and Coalesced Memory Organization. 36-43 - Shunchen Shi, Xueqi Li, Zhaowu Pan, Peiheng Zhang, Ninghui Sun:
CoPIM: A Collaborative Scheduling Framework for Commodity Processing-in-memory Systems. 44-51 - Zhongzhu Pu, Guangda Zhang, Tiejian Zhang, Chen Zhang, Youhui Zhang, Xia Zhao:
ChameSC: Virtualizing Superscalar Core of a SIMD Architecture for Vector Memory Access. 52-59 - Honglan Zhan, Chenxi Wang, Xin Wang, Chun Yang, Xianhua Liu, Xu Cheng:
Multi: Reduce Energy Overhead of Criticality-Aware Dynamic Instruction Scheduling for Energy Efficiency. 60-67 - Ning Yang, Fangxin Liu, Zongwu Wang, Zhiyan Song, Tao Yang, Li Jiang:
T-BUS: Taming Bipartite Unstructured Sparsity for Energy-Efficient DNN Acceleration. 68-75 - Zongwu Wang, Fangxin Liu, Xin Tang, Li Jiang:
PS4: A Low Power SNN Accelerator with Spike Speculative Scheme. 76-83 - Ziyang Jia, Laxmi N. Bhuyan, Daniel Wong:
PCCL: Energy-Efficient LLM Training with Power-Aware Collective Communication. 84-91 - Yamilka Toca-Díaz, Ruben Gran Tejero, Alejandro Valero:
Ensuring the Accuracy of CNN Accelerators Supplied at Ultra-Low Voltage. 92-95 - Behnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Lesley Shannon, Steve Wilton:
A Semi Black-Box Adversarial Bit- Flip Attack with Limited DNN Model Information. 96-104 - Jian Wang, Weiqiong Cao, Hua Chen, Haoyuan Li:
Blink: Breaking Parallel Implementation of Crystals-Kyber with Side-Channel Attack. 105-113 - Davide Galli, Giuseppe Chiari, Davide Zoni:
Hound: Locating Cryptographic Primitives in Desynchronized Side-Channel Traces using Deep-Learning. 114-121 - Wenbo Wang, Tao Xue, Shuailou Li, Zhaoyang Wang, Boyang Zhang, Yu Wen:
Interpretable Risk-aware Access Control for Spark: Blocking Attack Purpose Behind Actions. 122-129 - Avinash Ayalasomayajula, Henian Li, Hasan Al Shaikh, Sujan Kumar Saha, Farimah Farahmandi:
TDM: Time and Distance Metric for Quantifying Information Leakage Vulnerabilities in SoCs. 130-133 - Wenbo Guan, Xiaoyan Tang, Hongliang Lu, Jingru Tan, Jinlong Wang, Yuming Zhang:
Transformer-Characterized Approach for Chip Floorplanning: Leveraging HyperGCN and DTQN. 134-143 - Linyu Zhu, Xingyu Ma, Shaogang Hao, Yushan Pan, Xinfei Guo:
Elastic EDA: Auto-Scaling Cloud Resources for EDA Tasks via Learning-based Approaches. 144-153 - Kam Chi Loong, Shihao Han, Sishuo Liu, Ning Lin, Zhongrui Wang:
RNC: Efficient RRAM-aware NAS and Compilation for DNNs on Resource-Constrained Edge Devices. 154-161 - Mingzhe Gao, Jieru Zhao, Zhe Lin, Wenchao Ding, Xiaofeng Hou, Yu Feng, Chao Li, Minyi Guo:
AutoVCoder: A Systematic Framework for Automated Verilog Code Generation using LLMs. 162-169 - Urvij Saroliya, Eishi Arima, Dai Liu, Martin Schulz:
Reinforcement Learning-Driven Co-Scheduling and Diverse Resource Assignments on NUMA Systems. 170-178 - Huiliang Hong, Chenglong Xiao, Shanshan Wang:
Rethinking High-Level Synthesis Design Space Exploration from a Contrastive Perspective. 179-182 - Shucheng Wang, Qiang Cao, Kaiye Zhou, Jun Xu, Zhandong Guo, Jiannan Guo:
ParaCkpt: Heterogeneous Multi-Path Checkpointing Mechanism for Training Deep Learning Models. 183-190 - Zitong Bo, Chaoping Guo, Chang Leng, Ying Qiao, Hongan Wang:
RTDeepEnsemble: Real-Time DNN Ensemble Method for Machine Perception Systems. 191-198 - Yeonjae Kim, Igjae Kim, Kwanghoon Choi, Jeongseob Ahn, Jongse Park, Jaehyuk Huh:
Interference-Aware DNN Serving on Heterogeneous Processors in Edge Systems. 199-206 - Fangxin Liu, Ning Yang, Zhiyan Song, Zongwu Wang, Li Jiang:
HOLES: Boosting Large Language Models Efficiency with Hardware-Friendly Lossless Encoding. 207-214 - Yandong He, Guangda Zhang, Yongjun Zhang, Hengzhu Liu, Renzhi Chen:
OLSATM: Online Learning Based State-Aware Task Migration on S-NUCA Many-Cores. 215-218 - Paolo Salvatore Galfano, Giuseppe Sorrentino, Eleonora D'Arnese, Davide Conficconi:
Co-Designing a 3D Transformation Accelerator for Versal-Based Image Registration. 219-222 - Renzhi Xiao, Dan Feng, Yuchong Hu, Hong Jiang, Lin Wang, Yucheng Zhang, Lanlan Cui, Guanglei Xu, Fang Wang:
Read-Optimized Persistent Hash Index for Query Acceleration through Fingerprint Filtering and Lock-Free Prefetching. 223-230 - Dingze Hong, Jinlei Hu, Jianxi Chen, Dan Feng, Jian Liu:
Optimizing Structural Modification Operation for B+-Tree on Byte-Addressable Devices. 231-238 - Jianchang Su, Masoud Rahimi Jafari, Yifan Zhang, Wei Zhang:
FastMatch: Enhancing Data Pipeline Efficiency for Accelerated Distributed Training. 239-246 - Jun Su, Yinjin Fu, Nong Xiao:
Multi-Stage Dynamic Cuckoo Filters. 247-255 - Wenyu Peng, Tao Xie, Paul H. Siegel:
Persistent Spiral Storage. 256-259 - Matthew Naylor, Alexandre Joannou, A. Theodore Markettos, Paul Metzger, Simon W. Moore, Timothy M. Jones:
Advanced Dynamic Scalarisation for RISC-V GPGPUs. 260-267 - Luca Bertaccini, Siyuan Shen, Torsten Hoefler, Luca Benini:
Extending RISC-V for Efficient Overflow Recovery in Mixed-Precision Computations. 268-275 - Jingzhou Li, Kexiang Yang, Chufeng Jin, Xudong Liu, Zexia Yang, Fangfei Yu, Yujie Shi, Mingyuan Ma, Li Kong, Jing Zhou, Hualin Wu, Hu He:
Ventus: A High-performance Open-source GPGPU Based on RISC-V and Its Vector Extension. 276-279 - Cyril Koenig, Björn Forsberg, Luca Benini:
HeroSDK: Streamlining Heterogeneous RISC-V Accelerated Computing from Embedded to High-Performance Systems. 280-287 - Enrico Zelioli, Alessandro Ottaviano, Robert Balas, Nils Wistoff, Angelo Garofalo, Luca Benini:
vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-Criticality Systems. 288-291 - Bohan Hu, Yinyi Liu, Zhenguo Liu, Wei Zhang, Jiang Xu:
PCC: An End-to-End Compilation Framework for Neural Networks on Photonic-Electronic Accelerators. 292-299 - Zain Taufique, Aman Vyas, Antonio Miele, Pasi Liljeberg, Anil Kanduri:
Tango: Low Latency Multi-DNN Inference on Heterogeneous Edge Platforms. 300-307 - Valentino Peluso, Erich Malan, Andrea Calimera, Enrico Macii:
Private Tensor Freezing for an Efficient Federated Learning with Homomorphic Encryption. 308-315 - Dan Sturm, Sajjad Moazeni:
Pseudo-Sim: An Accurate Analytical Modeling Framework for Systolic Array Architectures. 316-319 - Yixuan Zhu, Wenqi Lou, Yinkang Gao, Binze Jiang, Xiaohang Gong, Xi Li:
Fine-Grained Shared Cache Interference Analysis Using Basic Block's Execution Time. 320-323 - Jintong Zhang, Haichuan Hu, Jianxi Chen, Yekang Zhan:
SchInFS: A File System Integrating Functions of the Block I/O Scheduler for ZNS SSDs. 324-331 - Linhui Liu, Yunfei Gu, Chenhao Zhu, Chentao Wu, Jie Li, Minyi Guo:
GCC: Optimizing Space Efficiency and Read Latency of SSDs with Workload-Aware Garbage Collection Aided Compression. 332-339 - Yongpeng Yang, Dejun Jiang, Bo Jiang, Hao-Chiang Hsu, Liang Peng, Zifeng Yang:
LBZ: A Lightweight Block Device for Supporting F2FS on ZNS SSD. 340-347 - Jialin Liu, Yujiong Liang, Yunpeng Song, Liang Shi:
RAID45: Hybrid Parity-Based RAID for Reducing Parity Write Wear on High-Density SSDs. 348-355 - Jinhua Cui, Feiyu Chen, Lu Li, Shiqiang Nie, Laurence T. Yang:
SmartNetSSD: Exploiting Path Resources for Read Performance Improvement in Network-Based SSDs. 356-359 - Wenqing Jia, Dejun Jiang, Jin Xiong:
SuperMap: High-Performance and Flexible Memory-Mapped IO for Fast Storage Device. 360-363 - Franz A. Fuchs, Jonathan Woodruff, Peter Rugg, Alexandre Joannou, Jessica Clarke, John Baldwin, Brooks Davis, Peter G. Neumann, Robert N. M. Watson, Simon W. Moore:
Safe Speculation for Cheri. 364-372 - Ziyue Zheng, Xiangchen Meng, Yangdi Lyu:
APE-FV: Concolic Testing for RTL Functional Verification Using Adaptive Path Exploration. 373-380 - Xiaohui Wei, Chenyang Wang, Zeyu Guan, Fengyi Li, Hengshan Yue:
HAp-FT: A Hybrid Approximate Fault Tolerance Framework for DNN Accelerator. 381-388 - Yifei Deng, Renzhi Chen, Chao Xiao, Zhijie Yang, Yuanfeng Luo, Jingyue Zhao, Na Li, Zhong Wan, Yongbao Ai, Huadong Dai, Lei Wang:
LLM - TG: Towards Automated Test Case Generation for Processors Using Large Language Models. 389-396 - Hyunmin Kim, Sungju Ryu:
NexusCIM: High-Throughput Multi-CIM Array Architecture with C-Mesh NoC and Hub Cores. 401-408 - Giyong Jung, Hee Ju Na, Sang-Hyo Kim, Jungrae Kim:
Dual-Axis ECC: Vertical and Horizontal Error Correction for Storage and Transfer Errors. 409-417 - Chen Zou, Andrew A. Chien:
VarVE: Bringing SIMD Performance to Variable-Width Values. 418-425 - Longyu Zhao, Zongwu Wang, Fangxin Liu, Li Jiang:
Ninja: A Hardware Assisted System for Accelerating Nested Address Translation. 426-433 - Jiawei Yang, Shaohua Wang, Xiangrui Yang, Yifan Zhang, Qiang Cao, Jie Yao, Xiaodi Tan, Xiao Lin:
HEncode: A Highly Modularized and Efficient FPGA QC-LDPC Encoder using High Level Synthesis. 434-437 - Zijun Jiang, Yangdi Lyu:
Efficient Microprocessor Design Space Exploration via Space Partitioning. 438-441 - Francesco Peverelli, Alessandro Verosimile, Davide Conficconi, Andrea Damiani, Marco D. Santambrogio:
SATL: A Spatial Architecture Rapid Prototyping Framework for Irregular Applications Acceleration. 442-445 - Guangjie Xing, Shuheng Gao, Hua Wang, Ke Zhou, Yaodong Han, Mengling Tao:
VDMig: An Adaptive Virtual Disk Migration Scheme for Cloud Block Storage System. 446-453 - Xueyuan Han, Zinuo Cai, Yichu Zhang, Chongxin Fan, Junhan Liu, Ruhui Ma, Rajkumar Buyya:
Hermes: Memory-Efficient Pipeline Inference for Large Models on Edge Devices. 454-461 - N. S. Aswathy, Hemangee K. Kapoor:
Opportunistic Migration for Hybrid Memories While Mitigating Aging Effects. 462-469 - Sheng Ma, Yunping Zhao, Yuhua Tang, Yi Dai:
HPA: A Hybrid Data Flow for PIM Architectures. 470-478 - Mingxuan Liu, Jianhua Gu, Tianhai Zhao:
LCKV: Learner-Cleaner Optimized Adaptive Key-Value Separated LSM-Tree Store. 479-482 - Lanlan Cui, Meng Zhang, Fei Wu:
LVLDPC: Intra-Layer Variation Aware LDPC Coding for 3D TLC NAND Flash Memory. 483-486 - Zihan Wang, Lei Gong, Wenqi Lou, Qianyu Cheng, Xianglan Chen, Chao Wang, Xuehai Zhou:
UniCoMo: A Unified Learning-Based Cost Model for Tensorized Program Tuning. 487-495 - Xinkai Wang, Chao Li, Lingyu Sun, Qizheng Lyu, Xiaofeng Hou, Jingwen Leng, Minyi Guo:
SHEEO: Continuous Energy Efficiency Optimization in Autonomous Embedded Systems. 496-503 - Xiangjun Qu, Lei Gong, Wenqi Lou, Qianyu Cheng, Xianglan Chen, Chao Wang, Xuehai Zhou:
AutoSparse: A Source-to-Source Format and Schedule Auto- Tuning Framework for Sparse Tensor Program. 504-512 - Haoyuan Zhang, Yidong Chen, Wenpeng Ma, Wu Yuan, Jian Zhang, Zhonghua Lu:
MIST: Efficient Mixed-Precision Preconditioning Through Iterative Sparse- Triangular Solver Design. 513-516 - Giuseppe Ruggeri, Renzo Andri, Daniele Jahier Pagliari, Lukas Cavigelli:
Deep Recommender Models Inference: Automatic Asymmetric Data Flow Optimization. 517-520 - Yuan Li, Renzhi Chen, Zhijie Yang, Xun Xiao, Jingyue Zhao, Zhenhua Zhu, Huadong Dai, Yuhua Tang, Weixia Xu, Li Luo, Lei Wang:
MOTPE/D: Hardware and Algorithm Co-design for Reconfigurable Neuromorphic Processor. 521-524 - Yuhong Song, Edwin Hsing-Mean Sha, Longshan Xu, Qingfeng Zhuge, Zili Shao:
Mera: Memory Reduction and Acceleration for Quantum Circuit Simulation via Redundancy Exploration. 525-533 - Robert S. Aviles, Peter A. Beerel:
A Joint Optimization of Buffer and Splitter Insertion for Phase-Skipping Adiabatic Quantum - Flux - Parametron Circuits. 534-541 - Marco Venere, Alessandro Barenghi, Gerardo Pelosi:
A Quantum Method to Match Vector Boolean Functions using Simon's Solver. 542-549 - Seungwoo Choi, Enhyeok Jang, Youngmin Kim, Won Woo Ro:
MOSQ: Accelerating Classical Simulation of UCCSD Ansatz Circuits using Merged Operation. 550-557 - Liang Yan, Xiaoyang Lu, Xiaoming Chen, Sheng Xu, Xingqi Zou, Yinhe Han, Xian-He Sun:
AceMiner: Accelerating Graph Pattern Matching using PIM with Optimized Cache System. 558-565 - Ashkan Asgharzadeh, Eduardo José Gómez-Hernández, Juan M. Cebrian, Stefanos Kaxiras, Alberto Ros:
Hardware Cache Locking for All Memory Updates. 566-574 - Yi Zhang, Yunpeng Song, Wentong Li, Yiyang Huang, Dingcui Yu, Mengyang Ma, Liang Shi:
CacheTrimmer: Adaptive Cache File Trimming for Optimized Performance and Lifetime on Mobile Devices. 575-582 - Baiqing Zhong, Mingyu Wang, Yicong Zhang, Xiaojie Li, Zhiyi Yu:
CCacheSim: A Circuit-Architecture Cross-Level Simulation Framework for SRAM-Based in-Cache Computing System Evaluation. 583-590 - Wenqiang Wang, Yuzhou Chen, Guanting Huo, Guanghui He, Ningyi Xu:
VEGA: Implementing a Versatile and Efficient Deep Learning Processor with Graph-Based ALU. 591-598 - Seoho Chung, Kwangrae Kim, Soomin Rho, Chanhoon Kim, Ki-Seok Chung:
FloatMax: An Efficient Accelerator for Transformer-Based Models Exploiting Tensor-Wise Adaptive Floating-Point Quantization. 599-607 - Qizhe Wu, Yuchen Gui, Zhichen Zeng, Xiaotian Wang, Huawen Liang, Xi Jin:
EN-T: Optimizing Tensor Computing Engines Performance via Encoder-Based Methodology. 608-615 - Vittoriano Muttillo, Vincenzo Stoico, Marco Santic, Giacomo Valente, Luigi Pomante, Daniele Frigioni:
SLIDE-x-ML: System-Level Infrastructure for Dataset E-xtraction and Machine Learning Framework for High-Level Synthesis Estimations. 616-619 - Xuan Zhang, Zhuoran Song, Peng Zhou, Xing Li, Xueyuan Liu, Xiaolong Lin, Zhezhi He, Li Jiang, Naifeng Jing, Xiaoyao Liang:
Early: An Importance-Aware Early Firing and Exit for SNN Acceleration. 624-627 - Changjae Yi, Hyunsu Moh, Soonhoi Ha:
Vision Transformer Inference on a CNN Accelerator. 628-636 - Kuan-Lin Chiu, Guy Eichler, Chuan-Tung Lin, Giuseppe Di Guglielmo, Luca P. Carloni:
WOLT: Transparent Deployment of ML Workloads on Lightweight Many-Accelerator Architectures. 637-644 - Sungbin Kim, Hyunwuk Lee, Sungwoo Kim, Cheolhwan Kim, Won Woo Ro:
AirGun: Adaptive Granularity Quantization for Accelerating Large Language Models. 645-652 - Fuyu Wang, Minghua Shen:
TileMap: Mapping Multi-Head Attention on Spatial Accelerators with Tile-based Analysis. 653-660 - Zhenhua Zhao, Zhaoyan Shen, Xiaojun Cai:
ISVDA: An in Storage Processing Accelerator for Visual Data Analysis. 661-664 - He Liu, Yipei Xu, Simin Tao, Zhipeng Huang, Biwei Xie, Xingquan Li, Wei Gao:
Simultaneous Conjugate Gradient and iAFF-UNet for Accurate IR Drop Calculation. 665-672 - Yilu Chen, Zhijie Cai, Min Wei, Zhifeng Lin, Jianli Chen:
Global and Local Attention-Based Inception U-Net for Static IR Drop Prediction. 673-680 - Gabriele Montanaro, Andrea Galimberti, Davide Zoni:
A Prototype-Based Framework to Design Scalable Heterogeneous SoCs with Fine-Grained DFS. 681-684 - Caaliph Andriamisaina, Kods Trabelsi, Pierre-Guillaume Le Guay:
A Methodology for Fast and Efficient ML-Based Power Modeling. 685-688 - Lukás Sekanina:
Tutorial: Evolutionary Design Methods in Electronic Design Automation. 689-690 - Flavio Ponzina, Rishikanth Chandrasekaran, Anya Wang, Seiji Minowada, Siddharth Sharma, Tajana Rosing:
Multi-Model Inference Composition of Hyperdimensional Computing Ensembles. 691-698 - Jing Liu, Zhiqian Guan, Di Liu, Shengfa Miao, Fei Dai:
Integrating Branching and Pruning for Efficient Hyperdimensional Computing. 699-706 - Hyunsei Lee, Jiseung Kim, Seohyun Kim, Hyukjun Kwon, Mohsen Imani, Ilhong Suh, Yeseong Kim:
Efficient Forward-Only Training for Brain-Inspired Hyperdimensional Computing. 707-714
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