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BibTeX record journals/tvlsi/WangHLC08
@article{DBLP:journals/tvlsi/WangHLC08, author = {Chua{-}Chin Wang and Chi{-}Chun Huang and Ching{-}Li Lee and Tsai{-}Wen Cheng}, title = {A Low Power High-Speed 8-Bit Pipelining {CLA} Design Using Dual-Threshold Voltage Domino Logic}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {16}, number = {5}, pages = {594--598}, year = {2008}, url = {https://doi.org/10.1109/TVLSI.2008.917561}, doi = {10.1109/TVLSI.2008.917561}, timestamp = {Wed, 11 Mar 2020 18:17:23 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/WangHLC08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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