BibTeX record journals/tc/VasudevanVSA07

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@article{DBLP:journals/tc/VasudevanVSA07,
  author    = {Shobha Vasudevan and
               Vinod Viswanath and
               Robert W. Sumners and
               Jacob A. Abraham},
  title     = {Automatic Verification of Arithmetic Circuits in {RTL} Using Stepwise
               Refinement of Term Rewriting Systems},
  journal   = {{IEEE} Trans. Computers},
  volume    = {56},
  number    = {10},
  pages     = {1401--1414},
  year      = {2007},
  url       = {http://dx.doi.org/10.1109/TC.2007.1073},
  doi       = {10.1109/TC.2007.1073},
  timestamp = {Tue, 22 Dec 2015 15:20:28 +0100},
  biburl    = {http://dblp.uni-trier.de/rec/bib/journals/tc/VasudevanVSA07},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}