BibTeX record journals/jssc/TanoiTTEIHOU94

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@article{DBLP:journals/jssc/TanoiTTEIHOU94,
  author       = {Satoru Tanoi and
                  Yasuhiro Tanaka and
                  Tetsuya Tanabe and
                  Akio Eta and
                  Toshio Inada and
                  Ryoji Hamazaki and
                  Yoshio Ohtsuki and
                  Masaru Uesugi},
  title        = {A 32-bank 256-Mb {DRAM} with cache and {TAG}},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {29},
  number       = {11},
  pages        = {1330--1335},
  year         = {1994},
  url          = {https://doi.org/10.1109/4.328632},
  doi          = {10.1109/4.328632},
  timestamp    = {Wed, 03 May 2023 22:43:49 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/TanoiTTEIHOU94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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