default search action
BibTeX record journals/jssc/LinK02
@article{DBLP:journals/jssc/LinK02, author = {Perng{-}Fei Lin and James B. Kuo}, title = {A 0.8-V 128-kb four-way set-associative two-level {CMOS} cache memory using two-stage wordline/bitline-oriented tag-compare {(WLOTC/BLOTC)} scheme}, journal = {{IEEE} J. Solid State Circuits}, volume = {37}, number = {10}, pages = {1307--1317}, year = {2002}, url = {https://doi.org/10.1109/JSSC.2002.803023}, doi = {10.1109/JSSC.2002.803023}, timestamp = {Mon, 04 Apr 2022 09:47:47 +0200}, biburl = {https://dblp.org/rec/journals/jssc/LinK02.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.