BibTeX record journals/jssc/KimKJKMCYCHPHCC99

• > Home > journals/jssc/KimKJKMCYCHPHCC99

@article{DBLP:journals/jssc/KimKJKMCYCHPHCC99,
  author       = {Changhyun Kim and
                  Kye{-}Hyun Kyung and
                  W.{-}P. Jeong and
                  J.{-}S. Kim and
                  Byung{-}Sik Moon and
                  Joon{-}Wan Chai and
                  S.{-}M. Yim and
                  Jung{-}Hwan Choi and
                  K.{-}H. Han and
                  C.{-}J. Park and
                  Hong{-}Sun Hwang and
                  H. Choi and
                  Sung{-}Burn Cho and
                  Clemenz L. Portmann and
                  Soo{-}In Cho},
  title        = {A 2.5-V, 72-Mbit, 2.0-GByte/s packet-based {DRAM} with a 1.0-Gbps/pin
                  interface},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {34},
  number       = {5},
  pages        = {645--652},
  year         = {1999},
  url          = {https://doi.org/10.1109/4.760374},
  doi          = {10.1109/4.760374},
  timestamp    = {Wed, 06 Jul 2022 14:43:33 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KimKJKMCYCHPHCC99.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}