BibTeX record journals/jssc/JeonLLJMCP04

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@article{DBLP:journals/jssc/JeonLLJMCP04,
  author       = {Young{-}Jin Jeon and
                  Joong{-}Ho Lee and
                  Hyun{-}Chul Lee and
                  Kyo{-}Won Jin and
                  Kyeong{-}Sik Min and
                  Jin{-}Yong Chung and
                  Hong{-}June Park},
  title        = {A 66-333-MHz 12-mW register-controlled {DLL} with a single delay line
                  and adaptive-duty-cycle clock dividers for production {DDR} SDRAMs},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {39},
  number       = {11},
  pages        = {2087--2092},
  year         = {2004},
  url          = {https://doi.org/10.1109/JSSC.2004.835809},
  doi          = {10.1109/JSSC.2004.835809},
  timestamp    = {Fri, 22 Apr 2022 09:29:32 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/JeonLLJMCP04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}