BibTeX record journals/jcsc/YangXQY17

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@article{DBLP:journals/jcsc/YangXQY17,
  author       = {Xinghua Yang and
                  Yue Xing and
                  Fei Qiao and
                  Huazhong Yang},
  title        = {Multistage Latency Adders Architecture Employing Approximate Computing},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {26},
  number       = {3},
  pages        = {1750039:1--1750039:18},
  year         = {2017},
  url          = {https://doi.org/10.1142/S0218126617500396},
  doi          = {10.1142/S0218126617500396},
  timestamp    = {Mon, 04 Sep 2023 12:29:24 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/YangXQY17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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