BibTeX record journals/jcsc/WuH15

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@article{DBLP:journals/jcsc/WuH15,
  author       = {Jigang Wu and
                  Xiaogang Han},
  title        = {Tight Upper Bound for Accelerating Reconfiguration of {VLSI} Arrays},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {24},
  number       = {7},
  pages        = {1550099:1--1550099:10},
  year         = {2015},
  url          = {https://doi.org/10.1142/S0218126615500991},
  doi          = {10.1142/S0218126615500991},
  timestamp    = {Tue, 25 Aug 2020 16:57:36 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/WuH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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