BibTeX record journals/jcsc/ChandrakarR19

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@article{DBLP:journals/jcsc/ChandrakarR19,
  author       = {Khushbu Chandrakar and
                  Suchismita Roy},
  title        = {A SAT-Based Methodology for Effective Clock Gating for Power Minimization},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {28},
  number       = {1},
  pages        = {1950011:1--1950011:17},
  year         = {2019},
  url          = {https://doi.org/10.1142/S0218126619500117},
  doi          = {10.1142/S0218126619500117},
  timestamp    = {Tue, 25 Aug 2020 16:58:07 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/ChandrakarR19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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