BibTeX record journals/ieicet/YuasaNO05

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@article{DBLP:journals/ieicet/YuasaNO05,
  author       = {Takeshi Yuasa and
                  Tamotsu Nishino and
                  Hideyuki Oh{-}Hashi},
  title        = {Simple Design Formula for Parallel Plate Mode Suppression by Ground
                  Via-Holes in Multi-Layered Packages},
  journal      = {{IEICE} Trans. Electron.},
  volume       = {88-C},
  number       = {7},
  pages        = {1401--1405},
  year         = {2005},
  url          = {https://doi.org/10.1093/ietele/e88-c.7.1401},
  doi          = {10.1093/IETELE/E88-C.7.1401},
  timestamp    = {Sat, 11 Apr 2020 14:48:44 +0200},
  biburl       = {https://dblp.org/rec/journals/ieicet/YuasaNO05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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