BibTeX record conf/vlsit/ShimoiMSOTKITMI22

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@inproceedings{DBLP:conf/vlsit/ShimoiMSOTKITMI22,
  author       = {Takahiro Shimoi and
                  Ken Matsubara and
                  Tomoya Saito and
                  Tomoya Ogawa and
                  Yasuhiko Taito and
                  Yoshinobu Kaneda and
                  Masayuki Izuna and
                  Koichi Takeda and
                  Hidenori Mitani and
                  Takashi Ito and
                  Takashi Kono},
  title        = {A 22nm 32Mb Embedded {STT-MRAM} Macro Achieving 5.9ns Random Read
                  Access and 5.8MB/s Write Throughput at up to Tj of 150 {\textdegree}C},
  booktitle    = {{IEEE} Symposium on {VLSI} Technology and Circuits {(VLSI} Technology
                  and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
  pages        = {134--135},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830273},
  doi          = {10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830273},
  timestamp    = {Thu, 04 Aug 2022 11:27:04 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsit/ShimoiMSOTKITMI22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}