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"A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and ..."

Takahiro Shimoi et al. (2022)

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DOI: 10.1109/VLSITECHNOLOGYANDCIR46769.2022.9830273

access: closed

type: Conference or Workshop Paper

metadata version: 2022-08-04

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  - conf/vlsit/ShimoiMSOTKITMI22
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  - https://dblp.org/rec/conf/vlsit/ShimoiMSOTKITMI22
Takahiro Shimoi, Ken Matsubara, Tomoya Saito, Tomoya Ogawa, Yasuhiko Taito, Yoshinobu Kaneda, Masayuki Izuna, Koichi Takeda, Hidenori Mitani, Takashi Ito, Takashi Kono:
A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C. VLSI Technology and Circuits 2022: 134-135

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