BibTeX
@inproceedings{DBLP:conf/vlsid/WangXRV07,
author = {Feng Wang 0004 and
Yuan Xie and
R. Rajaraman and
Balaji Vaidyanathan},
title = {Soft Error Rate Analysis for Combinational Logic Using An
Accurate Electrical Masking Model},
booktitle = {VLSI Design},
year = {2007},
pages = {165-170},
ee = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2007.145},
crossref = {DBLP:conf/vlsid/2007},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/vlsid/2007,
title = {20th International Conference on VLSI Design (VLSI Design
2007), Sixth International Conference on Embedded Systems
(ICES 2007), 6-10 January 2007, Bangalore, India},
booktitle = {VLSI Design},
publisher = {IEEE Computer Society},
year = {2007},
isbn = {0-7695-2502-4},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2007-05-10 by Michael Ley (ley@uni-trier.de)