BibTeX record conf/vlsid/PathakS23

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@inproceedings{DBLP:conf/vlsid/PathakS23,
  author       = {Meghvern Pathak and
                  Rahul Shrestha},
  title        = {Hardware Architecture and {FPGA} Implementation of Low Latency Turbo
                  Encoder for Deep-Space Communication Systems},
  booktitle    = {36th International Conference on {VLSI} Design and 2023 22nd International
                  Conference on Embedded Systems, {VLSID} 2023, Hyderabad, India, January
                  8-12, 2023},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/VLSID57277.2023.00016},
  doi          = {10.1109/VLSID57277.2023.00016},
  timestamp    = {Sat, 22 Apr 2023 17:02:07 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsid/PathakS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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