BibTeX record conf/vlsi/HashemiNN16

download as .bib file

@inproceedings{DBLP:conf/vlsi/HashemiNN16,
  author       = {Seyedeh Hanieh Hashemi and
                  Reza Namazian and
                  Zainalabedin Navabi},
  title        = {Optimistic clock adjustment for preventing Better-than-worst-case
                  violations},
  booktitle    = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration,
                  VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/VLSI-SoC.2016.7753571},
  doi          = {10.1109/VLSI-SOC.2016.7753571},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/vlsi/HashemiNN16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.