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"Optimistic clock adjustment for preventing Better-than-worst-case violations."

Seyedeh Hanieh Hashemi, Reza Namazian, Zainalabedin Navabi (2016)

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DOI: 10.1109/VLSI-SOC.2016.7753571

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

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  - conf/vlsi/HashemiNN16
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Seyedeh Hanieh Hashemi, Reza Namazian, Zainalabedin Navabi:
Optimistic clock adjustment for preventing Better-than-worst-case violations. VLSI-SoC 2016: 1-6

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