BibTeX record conf/vdat/SulthanCGT19

• > Home > conf/vdat/SulthanCGT19

@inproceedings{DBLP:conf/vdat/SulthanCGT19,
  author       = {Muneeb Sulthan and
                  Shubhajit Roy Chowdury and
                  Rajnish Garg and
                  Alok Tripathi},
  editor       = {Anirban Sengupta and
                  Sudeb Dasgupta and
                  Virendra Singh and
                  Rohit Sharma and
                  Santosh Kumar Vishvakarma},
  title        = {Design of a Power Efficient Pulse Latch Circuit as a Solution for
                  Master Slave Flip-Flop},
  booktitle    = {{VLSI} Design and Test - 23rd International Symposium, {VDAT} 2019,
                  Indore, India, July 4-6, 2019, Revised Selected Papers},
  series       = {Communications in Computer and Information Science},
  volume       = {1066},
  pages        = {532--540},
  publisher    = {Springer},
  year         = {2019},
  url          = {https://doi.org/10.1007/978-981-32-9767-8\_44},
  doi          = {10.1007/978-981-32-9767-8\_44},
  timestamp    = {Wed, 21 Aug 2019 13:30:37 +0200},
  biburl       = {https://dblp.org/rec/conf/vdat/SulthanCGT19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}