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"Design of a Power Efficient Pulse Latch Circuit as a Solution for Master ..."

Muneeb Sulthan et al. (2019)

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DOI: 10.1007/978-981-32-9767-8_44

access: closed

type: Conference or Workshop Paper

metadata version: 2019-08-21

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  dblp key:
  - conf/vdat/SulthanCGT19
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  - https://dblp.org/rec/conf/vdat/SulthanCGT19
Muneeb Sulthan, Shubhajit Roy Chowdury, Rajnish Garg, Alok Tripathi:
Design of a Power Efficient Pulse Latch Circuit as a Solution for Master Slave Flip-Flop. VDAT 2019: 532-540

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