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BibTeX record conf/vdat/ShekhawatJP21
@inproceedings{DBLP:conf/vdat/ShekhawatJP21, author = {Diksha Shekhawat and Apoorva Jangir and Jai Gopal Pandey}, title = {A Hardware Generator for Posit Arithmetic and its {FPGA} Prototyping}, booktitle = {25th International Symposium on {VLSI} Design and Test, {VDAT} 2021, Surat, India, September 16-18, 2021}, pages = {1--6}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/VDAT53777.2021.9601025}, doi = {10.1109/VDAT53777.2021.9601025}, timestamp = {Sun, 04 Aug 2024 19:41:25 +0200}, biburl = {https://dblp.org/rec/conf/vdat/ShekhawatJP21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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