BibTeX record conf/sips/OnizawaTH21

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@inproceedings{DBLP:conf/sips/OnizawaTH21,
  author       = {Naoya Onizawa and
                  Akira Tamakoshi and
                  Takahiro Hanyu},
  title        = {Scalable Hardware Architecture for Invertible Logic with Sparse Hamiltonian
                  Matrices},
  booktitle    = {{IEEE} Workshop on Signal Processing Systems, SiPS 2021, Coimbra,
                  Portugal, October 19-21, 2021},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/SiPS52927.2021.00047},
  doi          = {10.1109/SIPS52927.2021.00047},
  timestamp    = {Wed, 17 Nov 2021 17:36:53 +0100},
  biburl       = {https://dblp.org/rec/conf/sips/OnizawaTH21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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