BibTeX record conf/prime/BelliziaPST18

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@inproceedings{DBLP:conf/prime/BelliziaPST18,
  author       = {Davide Bellizia and
                  Gaetano Palumbo and
                  Giuseppe Scotti and
                  Alessandro Trifiletti},
  title        = {A Novel Very Low Voltage Topology to implement {MCML} {XOR} Gates},
  booktitle    = {14th Conference on Ph.D. Research in Microelectronics and Electronics,
                  {PRIME} 2018, Prague, Czech Republic, July 2-5, 2018},
  pages        = {157--160},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/PRIME.2018.8430320},
  doi          = {10.1109/PRIME.2018.8430320},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/prime/BelliziaPST18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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