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"A Novel Very Low Voltage Topology to implement MCML XOR Gates."

Davide Bellizia et al. (2018)

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DOI: 10.1109/PRIME.2018.8430320

access: closed

type: Conference or Workshop Paper

metadata version: 2018-08-15

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  dblp key:
  - conf/prime/BelliziaPST18
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  - https://dblp.org/rec/conf/prime/BelliziaPST18
Davide Bellizia, Gaetano Palumbo, Giuseppe Scotti, Alessandro Trifiletti:
A Novel Very Low Voltage Topology to implement MCML XOR Gates. PRIME 2018: 157-160

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