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BibTeX record conf/isvlsi/Shivanandamurthy21
@inproceedings{DBLP:conf/isvlsi/Shivanandamurthy21, author = {Supreeth Mysore Shivanandamurthy and Ishan G. Thakkar and Sayed Ahmad Salehi}, title = {{ATRIA:} {A} Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM {CNN} Processing}, booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2021, Tampa, FL, USA, July 7-9, 2021}, pages = {200--205}, publisher = {{IEEE}}, year = {2021}, url = {https://doi.org/10.1109/ISVLSI51109.2021.00045}, doi = {10.1109/ISVLSI51109.2021.00045}, timestamp = {Mon, 30 Aug 2021 15:18:48 +0200}, biburl = {https://dblp.org/rec/conf/isvlsi/Shivanandamurthy21.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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