BibTeX record conf/issoc/AssaadC07

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@inproceedings{DBLP:conf/issoc/AssaadC07,
  author       = {Maher Assaad and
                  David R. S. Cumming},
  title        = {{CMOS} {IC} Design and Verilog-A Modelling of 10-Gb/s PLL-Based Deserializer
                  for Inter-Chip Communication in {SOC}},
  booktitle    = {International Symposium on System-on-Chip, SoC 2007, Tampere, Finland,
                  November 20-21, 2007},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2007},
  url          = {https://doi.org/10.1109/ISSOC.2007.4427420},
  doi          = {10.1109/ISSOC.2007.4427420},
  timestamp    = {Mon, 05 Feb 2024 20:35:42 +0100},
  biburl       = {https://dblp.org/rec/conf/issoc/AssaadC07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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