BibTeX record conf/isscc/WordemanSMS12

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@inproceedings{DBLP:conf/isscc/WordemanSMS12,
  author       = {Matt Wordeman and
                  Joel Silberman and
                  Gary W. Maier and
                  Michael Scheuermann},
  title        = {A 3D system prototype of an eDRAM cache stacked over processor-like
                  logic using through-silicon vias},
  booktitle    = {2012 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2012, San Francisco, CA, USA, February 19-23, 2012},
  pages        = {186--187},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISSCC.2012.6176968},
  doi          = {10.1109/ISSCC.2012.6176968},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/WordemanSMS12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}