"A 3D system prototype of an eDRAM cache stacked over processor-like logic ..."

Matt Wordeman et al. (2012)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2012.6176968

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/WordemanSMS12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/WordemanSMS12
Matt Wordeman, Joel Silberman, Gary W. Maier, Michael Scheuermann:
A 3D system prototype of an eDRAM cache stacked over processor-like logic using through-silicon vias. ISSCC 2012: 186-187

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.