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"A 3D system prototype of an eDRAM cache stacked over processor-like logic ..."

Matt Wordeman et al. (2012)

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DOI: 10.1109/ISSCC.2012.6176968

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  dblp key:
  - conf/isscc/WordemanSMS12
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Matt Wordeman, Joel Silberman, Gary W. Maier, Michael Scheuermann:
A 3D system prototype of an eDRAM cache stacked over processor-like logic using through-silicon vias. ISSCC 2012: 186-187

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