BibTeX record conf/isscc/ChenHCCLHHLL14

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@inproceedings{DBLP:conf/isscc/ChenHCCLHHLL14,
  author       = {Shang{-}Ping Chen and
                  Chih{-}Chien Hung and
                  Qui{-}Ting Chen and
                  Sheng{-}Ming Chang and
                  Ming{-}Shi Liou and
                  Bo{-}Wei Hsieh and
                  Hsiang{-}I Huang and
                  Brian Liu and
                  Yan{-}Bin Luo},
  title        = {26.6 {A} 2.667Gb/s {DDR3} memory interface with asymmetric {ODT} on
                  wirebond package and single-side-mounted {PCB}},
  booktitle    = {2014 {IEEE} International Conference on Solid-State Circuits Conference,
                  {ISSCC} 2014, Digest of Technical Papers, San Francisco, CA, USA,
                  February 9-13, 2014},
  pages        = {448--449},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISSCC.2014.6757508},
  doi          = {10.1109/ISSCC.2014.6757508},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ChenHCCLHHLL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}