BibTeX record conf/islped/LiKCNR17

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@inproceedings{DBLP:conf/islped/LiKCNR17,
  author       = {William Y. Li and
                  Hyung Seok Kim and
                  Kailash Chandrashekar and
                  Khoa Minh Nguyen and
                  Ashoke Ravi},
  title        = {A 32nm, 0.65-10GHz, 0.9/0.3 ps/{\(\sigma\)} {TX/RX} jitter single
                  inductor digital fractional-n clock generator for reconfigurable serial
                  {I/O}},
  booktitle    = {2017 {IEEE/ACM} International Symposium on Low Power Electronics and
                  Design, {ISLPED} 2017, Taipei, Taiwan, July 24-26, 2017},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISLPED.2017.8009160},
  doi          = {10.1109/ISLPED.2017.8009160},
  timestamp    = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl       = {https://dblp.org/rec/conf/islped/LiKCNR17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}