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"A 32nm, 0.65-10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital ..."

William Y. Li et al. (2017)

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DOI: 10.1109/ISLPED.2017.8009160

access: closed

type: Conference or Workshop Paper

metadata version: 2017-08-17

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William Y. Li, Hyung Seok Kim, Kailash Chandrashekar, Khoa Minh Nguyen, Ashoke Ravi:
A 32nm, 0.65-10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital fractional-n clock generator for reconfigurable serial I/O. ISLPED 2017: 1-6

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