BibTeX record conf/islped/ChangCLH11

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@inproceedings{DBLP:conf/islped/ChangCLH11,
  author       = {Ming{-}Hung Chang and
                  Yi{-}Te Chiu and
                  Shu{-}Lin Lai and
                  Wei Hwang},
  editor       = {Naehyuck Chang and
                  Hiroshi Nakamura and
                  Koji Inoue and
                  Kenichi Osada and
                  Massimo Poncino},
  title        = {A 1kb 9T subthreshold {SRAM} with bit-interleaving scheme in 65nm
                  {CMOS}},
  booktitle    = {Proceedings of the 2011 International Symposium on Low Power Electronics
                  and Design, 2011, Fukuoka, Japan, August 1-3, 2011},
  pages        = {291--296},
  publisher    = {{IEEE/ACM}},
  year         = {2011},
  url          = {http://portal.acm.org/citation.cfm?id=2016869\&CFID=34981777\&CFTOKEN=25607807},
  timestamp    = {Mon, 13 Aug 2012 09:40:34 +0200},
  biburl       = {https://dblp.org/rec/conf/islped/ChangCLH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}