BibTeX record conf/iscas/WuWSH01

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@inproceedings{DBLP:conf/iscas/WuWSH01,
  author       = {Chien{-}Hsing Wu and
                  Chien{-}Ming Wu and
                  Ming{-}Der Shieh and
                  Yin{-}Tsung Hwang},
  title        = {Systolic {VLSI} realization of a novel iterative division algorithm
                  over GF(2m): a high-speed, low-complexity design},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {33--36},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922162},
  doi          = {10.1109/ISCAS.2001.922162},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/WuWSH01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}