BibTeX record conf/iscas/JiangSMH12

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@inproceedings{DBLP:conf/iscas/JiangSMH12,
  author       = {Jianfei Jiang and
                  Wei{-}Guang Sheng and
                  Zhi{-}Gang Mao and
                  Wei{-}Feng He},
  title        = {A pre-emphasis circuit design for high speed on-chip global interconnect},
  booktitle    = {2012 {IEEE} International Symposium on Circuits and Systems, {ISCAS}
                  2012, Seoul, Korea (South), May 20-23, 2012},
  pages        = {2941--2944},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISCAS.2012.6271933},
  doi          = {10.1109/ISCAS.2012.6271933},
  timestamp    = {Wed, 22 Jun 2022 14:34:18 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JiangSMH12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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