default search action
BibTeX record conf/isca/MishraDSXVD11
@inproceedings{DBLP:conf/isca/MishraDSXVD11, author = {Asit K. Mishra and Xiangyu Dong and Guangyu Sun and Yuan Xie and Narayanan Vijaykrishnan and Chita R. Das}, editor = {Ravi R. Iyer and Qing Yang and Antonio Gonz{\'{a}}lez}, title = {Architecting on-chip interconnects for stacked 3D {STT-RAM} caches in CMPs}, booktitle = {38th International Symposium on Computer Architecture {(ISCA} 2011), June 4-8, 2011, San Jose, CA, {USA}}, pages = {69--80}, publisher = {{ACM}}, year = {2011}, url = {https://doi.org/10.1145/2000064.2000074}, doi = {10.1145/2000064.2000074}, timestamp = {Mon, 15 May 2023 22:11:15 +0200}, biburl = {https://dblp.org/rec/conf/isca/MishraDSXVD11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.