BibTeX record conf/icta3/ZhangL0FFBPLZ21

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@inproceedings{DBLP:conf/icta3/ZhangL0FFBPLZ21,
  author       = {He Zhang and
                  Junzhan Liu and
                  Kang Wang and
                  Yunqian Fan and
                  Shufeng Fu and
                  Jinyu Bai and
                  Biao Pan and
                  Yongpan Liu and
                  Weisheng Zhao},
  title        = {A 40nm 33.6Tops/W 8T-SRAM Computing-in-Memory Macro with DAC-less
                  Spike-Pulse-Truncation Input and ADC-less Charge-Reservoir-Integrate-Counter
                  Output},
  booktitle    = {2021 {IEEE} International Conference on Integrated Circuits, Technologies
                  and Applications, {ICTA} 2021, Zhuhai, China, November 24-26, 2021},
  pages        = {123--124},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ICTA53157.2021.9661898},
  doi          = {10.1109/ICTA53157.2021.9661898},
  timestamp    = {Tue, 07 May 2024 15:24:38 +0200},
  biburl       = {https://dblp.org/rec/conf/icta3/ZhangL0FFBPLZ21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}