BibTeX record conf/icetet/KshirsagarV12

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@inproceedings{DBLP:conf/icetet/KshirsagarV12,
  author       = {R. V. Kshirsagar and
                  M. V. Vyawahare},
  title        = {{FPGA} Implementation of High Speed {VLSI} Architectures for {AES}
                  Algorithm},
  booktitle    = {2012 Fifth International Conference on Emerging Trends in Engineering
                  and Technology, Himeji, Japan, November 5-7, 2012},
  pages        = {239--242},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ICETET.2012.53},
  doi          = {10.1109/ICETET.2012.53},
  timestamp    = {Wed, 16 Oct 2019 14:14:54 +0200},
  biburl       = {https://dblp.org/rec/conf/icetet/KshirsagarV12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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