GoudarziI08'

BibTeX

@inproceedings{DBLP:conf/glvlsi/GoudarziI08,
  author    = {Maziar Goudarzi and
               Tohru Ishihara},
  title     = {Instruction cache leakage reduction by changing register
               operands and using asymmetric sram cells},
  booktitle = {ACM Great Lakes Symposium on VLSI},
  year      = {2008},
  pages     = {383-386},
  ee        = {http://doi.acm.org/10.1145/1366110.1366201},
  crossref  = {DBLP:conf/glvlsi/2008},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/glvlsi/2008,
  editor    = {Vijay Narayanan and
               Zhiyuan Yan and
               Enrico Macii and
               Sanjukta Bhanja},
  title     = {Proceedings of the 18th ACM Great Lakes Symposium on VLSI
               2008, Orlando, Florida, USA, May 4-6, 2008},
  booktitle = {ACM Great Lakes Symposium on VLSI},
  publisher = {ACM},
  year      = {2008},
  isbn      = {978-1-59593-999-9},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}