BibTeX record conf/coolchips/ItoO16

download as .bib file

@inproceedings{DBLP:conf/coolchips/ItoO16,
  author       = {Megumi Ito and
                  Moriyoshi Ohara},
  title        = {A power-efficient {FPGA} accelerator: Systolic array with cache-coherent
                  interface for pair-HMM algorithm},
  booktitle    = {2016 {IEEE} Symposium in Low-Power and High-Speed Chips, {COOL} {CHIPS}
                  XIX, Yokohama, Japan, April 20-22, 2016},
  pages        = {1--3},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/CoolChips.2016.7503681},
  doi          = {10.1109/COOLCHIPS.2016.7503681},
  timestamp    = {Thu, 23 Mar 2023 23:58:22 +0100},
  biburl       = {https://dblp.org/rec/conf/coolchips/ItoO16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.