BibTeX record conf/aspdac/YoshimotoTOSMKY13

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@inproceedings{DBLP:conf/aspdac/YoshimotoTOSMKY13,
  author       = {Shusuke Yoshimoto and
                  Masaharu Terada and
                  Shunsuke Okumura and
                  Toshikazu Suzuki and
                  Shinji Miyano and
                  Hiroshi Kawaguchi and
                  Masahiko Yoshimoto},
  title        = {A 40-nm 0.5-V 12.9-pJ/Access 8T {SRAM} using low-power disturb mitigation
                  technique},
  booktitle    = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2013, Yokohama, Japan, January 22-25, 2013},
  pages        = {77--78},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ASPDAC.2013.6509564},
  doi          = {10.1109/ASPDAC.2013.6509564},
  timestamp    = {Mon, 11 Mar 2024 15:42:29 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/YoshimotoTOSMKY13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}