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BibTeX record conf/aspdac/ChenT99
@inproceedings{DBLP:conf/aspdac/ChenT99, author = {Chun{-}hong Chen and Chi{-}Ying Tsui}, title = {Timing Optimization of Logic Network Using Gate Duplication}, booktitle = {Proceedings of the 1999 Conference on Asia South Pacific Design Automation, Wanchai, Hong Kong, China, January 18-21, 1999}, pages = {233--236}, publisher = {{IEEE} Computer Society}, year = {1999}, url = {https://doi.org/10.1109/ASPDAC.1999.760003}, doi = {10.1109/ASPDAC.1999.760003}, timestamp = {Thu, 23 Mar 2023 23:58:22 +0100}, biburl = {https://dblp.org/rec/conf/aspdac/ChenT99.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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