BibTeX record conf/asicon/LuLPLZLW19

download as .bib file

@inproceedings{DBLP:conf/asicon/LuLPLZLW19,
  author       = {Zhi{-}Yin Lu and
                  Jia{-}Feng Liu and
                  Yunbing Pang and
                  Zhengjie Li and
                  Yufan Zhang and
                  Jin{-}Mei Lai and
                  Jian Wang},
  title        = {A Low-delay Configurable Register for {FPGA}},
  booktitle    = {13th {IEEE} International Conference on ASIC, {ASICON} 2019, Chongqing,
                  China, October 29 - November 1, 2019},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ASICON47005.2019.8983553},
  doi          = {10.1109/ASICON47005.2019.8983553},
  timestamp    = {Wed, 15 Jun 2022 07:53:17 +0200},
  biburl       = {https://dblp.org/rec/conf/asicon/LuLPLZLW19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.