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Journal Articles
- 2016
[j20]Harris E. Michail, George Athanasiou, Vasilios I. Kelefouras, George Theodoridis, Thanos Stouraitis
, Costas E. Goutis:
Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs. J. Circuits Syst. Comput. 25(4): 1650032:1-1650032:26 (2016)- [j19]Harris E. Michail, Georgios Athanasiou, George Theodoridis, Andreas Gregoriades, Costas E. Goutis:
Design and implementation of totally-self checking SHA-1 and SHA-256 hash functions' architectures. Microprocess. Microsystems 45: 227-240 (2016) - 2014
- [j18]Georgios Athanasiou, Harris E. Michail, George Theodoridis, Costas E. Goutis:
Optimising the SHA-512 cryptographic hash function on FPGAs. IET Comput. Digit. Tech. 8(2): 70-82 (2014) - [j17]Harris E. Michail, Georgios Athanasiou, George Theodoridis, Costas E. Goutis:
On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs. Integr. 47(4): 387-407 (2014) - 2013
- [j16]George Athanasiou, Harris E. Michail, George Theodoridis, Costas E. Goutis:
High-performance FPGA implementations of the cryptographic hash function JH. IET Comput. Digit. Tech. 7(1): 29-40 (2013) - [j15]George Athanasiou, George Theodoridis, Costas E. Goutis, Harris E. Michail, Takis Kasparis:
A Systematic Flow for Developing Totally Self-Checking Architectures for SHA-1 and SHA-2 Cryptographic Hash Families. J. Circuits Syst. Comput. 22(6) (2013) - 2012
- [j14]Nikolaos Alachiotis, Vasilios I. Kelefouras, George Athanasiou, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis:
A data locality methodology for matrix-matrix multiplication algorithm. J. Supercomput. 59(2): 830-851 (2012) - [j13]Harris E. Michail, George Athanasiou, Vasilios I. Kelefouras, George Theodoridis, Costas E. Goutis:
On the exploitation of a high-throughput SHA-256 FPGA design for HMAC. ACM Trans. Reconfigurable Technol. Syst. 5(1): 2:1-2:28 (2012) - 2011
- [j12]Harris E. Michail, Dimitrios M. Schinianakis, Costas E. Goutis, Athanasios P. Kakarountas, Georgios N. Selimis:
Cipher Block Based Authentication Module: a Hardware Design Perspective. J. Circuits Syst. Comput. 20(2): 163-184 (2011) - [j11]Vasilios I. Kelefouras, George Athanasiou, Nikolaos Alachiotis, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis:
A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization. IEEE Trans. Signal Process. 59(12): 6217-6226 (2011) - 2010
- [j10]Athanasios Milidonis, Nikolaos Alachiotis, Vasileios Porpodas, Harris E. Michail, George A. Panagiotakopoulos, Athanasios P. Kakarountas, Costas E. Goutis:
Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy. J. Signal Process. Syst. 59(3): 281-296 (2010) - 2009
- [j9]Athanasios Milidonis, Vasileios Porpodas, Nikolaos Alachiotis, Athanasios P. Kakarountas, Harris E. Michail, George A. Panagiotakopoulos, Costas E. Goutis:
Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse. IET Comput. Digit. Tech. 3(1): 109-123 (2009) - [j8]George N. Selimis, Apostolos P. Fournaris, Harris E. Michail, Odysseas G. Koufopavlou:
Improved throughput bit-serial multiplier for GF(2m) fields. Integr. 42(2): 217-226 (2009) - [j7]Andreas Gregoriades, Maria Pampaka, Harris E. Michail:
Assessing Students' Learning in MIS using Concept Mapping. J. Inf. Syst. Educ. 20(4): 419-430 (2009) - [j6]Dimitrios M. Schinianakis, Apostolos P. Fournaris, Harris E. Michail, Athanasios P. Kakarountas, Thanos Stouraitis:
An RNS Implementation of an Fp Elliptic Curve Point Multiplier. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(6): 1202-1213 (2009) - [j5]Harris E. Michail, Athanasios Kakarountas, Athanasios Milidonis, Costas E. Goutis:
A Top-Down Design Methodology for Ultrahigh-Performance Hashing Cores. IEEE Trans. Dependable Secur. Comput. 6(4): 255-268 (2009) - 2008
- [j4]Harris E. Michail, Georgios N. Selimis, Michalis D. Galanis, Dimitrios M. Schinianakis, Constantinos E. Goutis:
Novel Hardware Implementation of the Cipher Message Authentication Code. J. Comput. Networks Commun. 2008: 923079:1-923079:6 (2008) - 2007
- [j3]Harris E. Michail, George A. Panagiotakopoulos, Vasilis N. Thanasoulis, Athanasios Kakarountas, Costas E. Goutis:
Server side hashing core exceeding 3 Gbps of throughput. Int. J. Secur. Networks 2(3/4): 228-238 (2007) - 2006
- [j2]Athanasios Kakarountas, Nikolaos D. Zervas, George Theodoridis, Haralambos Michail, Dimitrios Soudris:
Power Management Through Dynamic Frequency Scaling for Low and Medium Bit-Rate Digital Receivers. J. Low Power Electron. 2(3): 356-364 (2006) - [j1]Athanasios Kakarountas, Haralambos Michail, Athanasios Milidonis, Costas E. Goutis, George Theodoridis:
High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications. J. Supercomput. 37(2): 179-195 (2006)
Conference and Workshop Papers
- 2022
- [c24]Andreas Gregoriades, Loukas Dimitriou, Harris E. Michail, Maria Pampaka, Michael Georgiades:
Machine Learning Analysis of Pedestrians' Hazard Anticipation from Eye Tracking Data. ATT@IJCAI 2022: 137-159 - 2018
- [c23]Andreas Gregoriades, Maria Pampaka, Harris E. Michail, Maria Viugova:
Design and validation of an agent-based driving simulator. SummerSim 2018: 6:1-6:12 - 2015
- [c22]Harris E. Michail, Apostolis Kotsiolis, Athanasios Kakarountas, George Athanasiou, Costas E. Goutis:
Hardware implementation of the Totally Self-Checking SHA-256 hash core. EUROCON 2015: 1-5 - [c21]Harris E. Michail, Lenos Ioannou, Artemios G. Voyiatzis:
Pipelined SHA-3 Implementations on FPGA: Architecture and Performance Analysis. CS2@HiPEAC 2015: 13-18 - [c20]Lenos Ioannou, Harris E. Michail, Artemios G. Voyiatzis:
High performance pipelined FPGA implementation of the SHA-3 hash algorithm. MECO 2015: 68-71 - [c19]Andreas Gregoriades, Jack Hadjicosti, Christos Florides, Maria Pampaka, Harris E. Michail:
A driving simulator for discovering requirements in complex systems. SummerSim 2015: 3:1-3:10 - 2014
- [c18]Harris E. Michail, Constantinos Louca, Dimitris Gavrilis, Andreas Gregoriades, Lazaros Anastasiou, Marinos Ioannides:
Distribution of Cultural Content through Exploitation of Cryptographic Algorithms and Hardware Identification. EuroMed 2014: 156-165 - 2012
- [c17]Dimitris Tsitsipis, Sofia-Maria Dima, Angeliki Kritikakou, Christos Panagiotou, John V. Gialelis, Harris E. Michail, Stavros A. Koubias:
Priority Handling Aggregation Technique (PHAT) for Wireless Sensor Networks. ETFA 2012: 1-8 - [c16]George Athanasiou, Harris E. Michail, Andreas Gregoriades, Marinos Ioannides:
Evolution of the e-Museum Concept through Exploitation of Cryptographic Algorithms. EuroMed 2012: 291-300 - [c15]Andreas Gregoriades, Kyriacos C. Mouskos, Harris E. Michail:
An Intelligent Transportation System for Accident Risk Index Quantification. ICEIS (1) 2012: 318-321 - [c14]George Athanasiou, Chara I. Chalkou, D. Bardis, Harris E. Michail, George Theodoridis, Costas E. Goutis:
High-throughput Hardware Architectures of the JH Round-three SHA-3 Candidate - An FPGA Design and Implementation Approach. SECRYPT 2012: 126-135 - [c13]Harris E. Michail, George Athanasiou, Andreas Gregoriades, George Theodoridis, Costas E. Goutis:
On the Development of Totally Self-checking Hardware Design for the SHA-1 Hash Function. SECRYPT 2012: 270-275 - 2010
- [c12]Harris E. Michail, George Athanasiou, George Makridakis, Costas E. Goutis:
Designs and comparisons of authentication modules for IPSec in configurable and extensible embedded processor. ICECS 2010: 243-246 - [c11]Andreas Gregoriades, Samuel Obadan, Harris E. Michail, Vicky Papadopoulou, Despina Michael:
A Robotic System for Home Security Enhancement. ICOST 2010: 43-52 - [c10]Harris E. Michail, George Athanasiou, Angeliki Kritikakou, Costas E. Goutis, Andreas Gregoriades, Vicky G. Papadopoulou:
Ultra High Speed SHA-256 Hashing Cryptographic Module for IPSec Hardware/Software Codesign. SECRYPT 2010: 309-313 - 2007
- [c9]Athanasios Milidonis, Nikolaos Alachiotis, Vasileios Porpodas, Haralambos Michail, Athanasios Kakarountas, Constantinos E. Goutis:
Interactive presentation: A decoupled architecture of processors with scratch-pad memory hierarchy. DATE 2007: 612-617 - [c8]Athanasios P. Kakarountas, Haralambos Michail, Costas E. Goutis, Costas Efstathiou:
Implementation of HSSec: a high-speed cryptographic co-processor. ETFA 2007: 625-631 - [c7]Harris E. Michail, Athanasios P. Kakarountas, Georgios N. Selimis, Constantinos E. Goutis:
Throughput Optimization of the Cipher Message Authentication Code. DSP 2007: 495-498 - 2006
- [c6]Harris E. Michail, Athanasios P. Kakarountas, Athanasios Milidonis, George A. Panagiotakopoulos, Vasilis N. Thanasoulis, Costas E. Goutis:
Temporal and System Level Modifications for High Speed VLSI Implementations of Cryptographic Core. ICECS 2006: 1180-1183 - 2005
- [c5]Harris E. Michail, Athanasios Milidonis, Athanasios Kakarountas, Constantinos E. Goutis:
Novel high throughput implementation of SHA-256 hash function through pre-computation technique. ICECS 2005: 1-4 - [c4]Georgios N. Selimis, N. Lazarou, Harris E. Michail, Odysseas G. Koufopavlou:
VLSI design and implementation of reconfigurable cryptographic systems for symmetric encryption. ICECS 2005: 1-4 - [c3]Haralambos Michail, Athanasios P. Kakarountas, Odysseas G. Koufopavlou, Constantinos E. Goutis:
A low-power and high-throughput implementation of the SHA-1 hash function. ISCAS (4) 2005: 4086-4089 - [c2]Haralambos Michail, Athanasios Kakarountas, George N. Selimis, Costas E. Goutis:
Optimizing SHA-1 Hash Function for High Throughput with a Partial Unrolling Study. PATMOS 2005: 591-600 - 2004
- [c1]Harris E. Michail, Athanasios P. Kakarountas, Athanasios Milidonis, Costas E. Goutis:
Efficient implementation of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function. ICECS 2004: 567-570
Coauthor Index
aka: Georgios Athanasiou
aka: Costas E. Goutis
aka: Athanasios P. Kakarountas
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