Yong Kim

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Hong Jeong

> Home > Persons > Yong Kim

Publications

2007
[j3]
- view
  authority control:
- export record
  dblp key:
  - journals/ieicet/KimJ07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieicet/KimJ07
Yong Kim, Hong Jeong:
A Systolic FPGA Architecture of Two-Level Dynamic Programming for Connected Speech Recognition. IEICE Trans. Inf. Syst. 90-D(2): 562-568 (2007)
2006
[c10]
- view
  authority control:
- export record
  dblp key:
  - conf/kes/KimJ06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/kes/KimJ06
Yong Kim, Hong Jeong:
Two-Level Dynamic Programming Hardware Implementation for Real Time Processing. KES (1) 2006: 1090-1097
2005
[c8]
- no documents available
  - no references & citations available
- export record
  dblp key:
  - conf/aia/JeongK05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/aia/JeongK05
Hong Jeong, Yong Kim:
A Parallel FPGA Architecture for Blind Separation of Speech Signals. Artificial Intelligence and Applications 2005: 509-514
[c6]
- no documents available
  - no references & citations available
- export record
  dblp key:
  - conf/icai/JeongK05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/icai/JeongK05
Hong Jeong, Yong Kim:
A Systolic Architecture and FPGA Implementation of Blind Source Separation. IC-AI 2005: 963-969
[c5]
- view
  authority control:
- export record
  dblp key:
  - conf/iwinac/KimJ05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iwinac/KimJ05
Yong Kim, Hong Jeong:
A FPGA Architecture of Blind Source Separation and Real Time Implementation. IWINAC (2) 2005: 347-356
[c4]
- view
  authority control:
- export record
  dblp key:
  - conf/kes/KimJ05a
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/kes/KimJ05a
Yong Kim, Hong Jeong:
A Parallel Array Architecture of MIMO Feedback Network and Real Time Implementation. KES (1) 2005: 996-1003
2003
[c1]
- view
  - electronic edition @ actapress.com
  - no references & citations available
- export record
  dblp key:
  - conf/sip/JeongK03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/sip/JeongK03
Hong Jeong, Yong Kim:
A Systolic Architecture of VLSI Implementation of Dynamic Time Warping for Speech Recognition. SIP 2003: 109-114

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.