Matthias Keller

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Maurits Ortmanns

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Publications

2010
[c12]
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Jens Sauerbrey, Jacinto San Pablo Garcia, Georgi Panov, Thomas Piorek, Xianghua Shen, Markus Schimper, Rudolf Koch, Matthias Keller, Yiannos Manoli, Maurits Ortmanns:
A configurable cascaded continuous-time ΔΣ modulator with up to 15MHz bandwidth. ESSCIRC 2010: 426-429
2008
[j2]
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Matthias Keller, Alexander Buhmann, Jens Sauerbrey, Maurits Ortmanns, Yiannos Manoli:
A Comparative Study on Excess-Loop-Delay Compensation Techniques for Continuous-Time Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3480-3487 (2008)
[c6]
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Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
Analysis of digital gain error compensation in continuous-time cascaded sigma-delta modulators. ISCAS 2008: 1874-1877
2007
[j1]
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Matthias Keller, Alexander Buhmann, Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli:
On the Implicit Anti-Aliasing Feature of Continuous-Time Cascaded Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(12): 2639-2645 (2007)
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Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
A Method for the Discrete-Time Simulation of Continuous-Time Sigma-Delta Modulators. ISCAS 2007: 241-244
[c4]
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Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
On the Implicit Anti-Aliasing Feature of Continuous-Time Multistage Noise-Shaping Sigma-Delta Modulators. ISCAS 2007: 721-724
[c3]
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Alexander Buhmann, Matthias Keller, Maurits Ortmanns, Yiannos Manoli:
Estimating Circuit Nonidealities of Continuous-Time Multibit Delta-Sigma Modulators. ISCAS 2007: 2264-2267

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