Yu-Chin Hsu

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Fur-Shing Tsai

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Publications

2007
[c27]
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Eric Cheung, Xi Chen, Fur-Shing Tsai, Yu-Chin Hsu, Harry Hsieh:
Bridging RTL and gate: correlating different levels of abstraction for design debugging. HLDVT 2007: 73-80
2006
[c26]
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  - conf/dac/HsuTJC06
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Yu-Chin Hsu, Fur-Shing Tsai, Wells Jong, Ying-Tsai Chang:
Visibility enhancement for silicon debug. DAC 2006: 13-18
2003
[c24]
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  - conf/dac/HsuTCT03
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Yu-Chin Hsu, Bassam Tabbara, Yirng-An Chen, Fur-Shing Tsai:
Advanced techniques for RTL debugging. DAC 2003: 362-367
2002
[j22]
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  - journals/todaes/LinCHT02
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Shi-Zheng Eric Lin, Chieh Changfan, Yu-Chin Hsu, Fur-Shing Tsai:
Optimal time borrowing analysis and timing budgeting optimization for latch-based designs. ACM Trans. Design Autom. Electr. Syst. 7(1): 217-230 (2002)
2000
[j21]
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  - journals/tcad/ChangfanHT00
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Chieh Changfan, Yu-Chin Hsu, Fur-Shing Tsai:
Timing optimization on routed designs with incremental placementand routing characterization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(2): 188-196 (2000)
1999
[c22]
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  - conf/ispd/ChangfanHT99
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Chieh Changfan, Yu-Chin Hsu, Fur-Shing Tsai:
Post-routing timing optimization with routing characterization. ISPD 1999: 30-35
1997
[j17]
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  - journals/vlsi/TsaiH97
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Fur-Shing Tsai, Yu-Chin Hsu:
Layout Modeling and Design Space Exploration in Pss1 System. VLSI Design 5(2): 211-221 (1997)
1992
[j8]
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  - journals/tcad/TsaiH92
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Fur-Shing Tsai, Yu-Chin Hsu:
STAR: An automatic data path allocator. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(9): 1053-1064 (1992)
1990
[j3]
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  - journals/tcad/LinHT90
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Youn-Long Lin, Yu-Chin Hsu, Fur-Shing Tsai:
Hybrid routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(2): 151-157 (1990)
[c6]
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  - conf/iccad/TsaiH90
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Fur-Shing Tsai, Yu-Chin Hsu:
Data Path Construction and Refinement. ICCAD 1990: 308-311
1989
[j1]
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Youn-Long Lin, Yu-Chin Hsu, Fur-Shing Tsai:
SILK: a simulated evolution router. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8(10): 1108-1114 (1989)
[c2]
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Youn-Long Lin, Yu-Chin Hsu, Fur-Shing Tsai:
Routing using a pyramid data structure. ICCAD 1989: 436-439
1988
[c1]
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Youn-Long Lin, Yu-Chin Hsu, Fur-Shing Tsai:
A detailed router based on simulated evolution. ICCAD 1988: 38-41

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